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Voltage controlled oscillator delay cell

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专利内容由知识产权出版社提供

专利名称:Voltage controlled oscillator delay cell发明人:Mohan Krishna Kunanayagam,Shubha

Sharma

申请号:US11030540申请日:20050106

公开号:US20050116757A1公开日:20050602

专利附图:

摘要:A voltage-controlled oscillator design is disclosed that provides greater tuningrange than a prior art differential amplifier design using “varactor” diodes. The designemploys CMOS capacitors to replace varactor diodes. The CMOS capacitors are formed

from PMOS transistors in which the drain of the transistor is electrically connected to thesource of the same transistor, so that voltage-dependant capacitors are formed betweenthe gate-to-source terminals and the gate-to-drain terminals of the PMOS transistor.Secondly, the monolithic inductors employed in the prior art are replaced by “active”inductors: the combination of a resistor connected in series with the gate of an NMOStransistor, where the potential at the drain of the NMOS transistor is held below that ofthe second terminal of the resistor by at least the threshold, or turn-on voltage, of thetransistor. The resistor/transistor combination acts inductively at the frequency ofoscillation of interest.

申请人:Mohan Krishna Kunanayagam,Shubha Sharma

地址:Jalan Usahawan MY,Jalan Usahawan MY

国籍:MY,MY

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